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OT: African Computer Technology Comes Full Circle
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[QUOTE]Originally posted by meninarmer: [QB] The above Open Source release of Sun's UltraSparc Processor is a fantastic OPPORTUNITY for developers to utilize a free source for developing ultra high end computers using inexpensive FPGA/ASIC devices. By using FPGAs, the developer is not tied to an expensive Integrated Circuit fabrication process which could cost 100s of thousands or millions of dollars of investment. Because Sun Microsystems releases the VHDL code, processors can be developed as subsets or super-sets of the original design, meaning your custom design can downgrade from the original 8 cores to one, two, or more. The design can also be augmented as a Superset by adding applications specific features. For example, direct coupling to Power Plant transducers and sensors for monitoring critical parameters or motion control motors and sensors for automotive applications. Your end product will be customized to reflect your company's differentiation. The company may literally design and deploy home grown custom processors on a standard Engineering workstation for a few thousand dollars investment. The power present in the UltraSPARC is State-Of-The-Art, and in most cases, represents a huge differential relative to the purchase and use of commercial-Off-The-Shelf alternatives. That the UltraSPARC was the very first release of a multi-core, multi-threaded high end processor is very significant. Because the architecture is based on the SPARC blue book, the processor is capable of running the ultra relaible Solaris Operating system, or the freely available Linux Operating system. While the SPARC architecture is NOT Windows compatible, additional hardware enhancement may be added to the SPARC block to perform hardware assist to Windows emulation. Even using software Windows emulation, the system would see 5-10x the performance of an AMD Geode processor. Below, are the functional features of the Open released UltraSPARC T1/T2 processor. -Designed by Dr. Kunle Olukotun at Stanford University (See Photo above) -Fully Supported by all Sun Operating systems (Solaris, OpenSolaris) and applications -Fully supported under Linux -Design is under the GNU GPL -2-4 GHz Operating frequency -64-bit Memory adressing (Flat mode) -64 & 32-bit Instruction path -8 CPU cores per device with up to 8 threads per core -SPARC Hypervisor -64-bit floating-point types conform to IEEE Std 754-1985 -128-bit floating-point type conforms to IEEE Std 1596.5-1992 -Based on VLSI design methodology, therefore completely repeatable -Can be shipped in FPGA form - Customized Coprocessors can be added for any conceivable purpose, including (but hardly limited to) the following: Network routing/Network acceleration or offload Floating-point acceleration Cryptographic processing I/O compression/decompression engines Audio compression/decompression (codecs) Video codecs I/O interface units for embedded devices such as displays or input sensors (DNA analysis, facial recognition, Voice recognition, Voice Synthesis, etc) - Verilog RTL (VHDL) provides a large, real-world input dataset for CAD/EDA tools Development support under Open Source community http://www.opensparc.net/opensparc-t1/index.html [/QB][/QUOTE]
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